VGA Output Example (Parallel Mode Transfers)

This example demonstrates the generation of an analogue VGA signal from a PIC32 microcontroller using the parallel mode (parallel master port, PMP) peripheral. The result is not entirely satisfactory:

Pixels are very narrow unless buffered using a flip-flop driven by the peripheral, this being a characteristic of the way the peripheral works, it normally being used to drive memory and display controllers.
Introducing a flip-flop means that the final pixel from the pixel data remains asserted and must be reset using a second DMA channel.
Every fourth pixel is wider than the others, this apparently being an artefact of the DMA transfer mechanism.

It might be possible introduce some kind of delay to the write strobe (PMWR) and even out the pixel widths, but this has not been investigated.

It appears to be the case that the system and peripheral clock frequencies need to be matched. In this example, a frequency of 48MHz has been chosen.

Hardware Details

The pin usage of this solution is documented below.

PIC32MX270F256B-50I/SP Pin Assignments

MCLR#          1  \/  28
  D7/PMD7/RA0  2      27
  D6/PMD6/RA1  3      26 RB15/U1TX
  D0/PMD0/RB0  4      25 RB14
  D1/PMD1/RB1  5      24 RB13/(PMRD)/U1RX
  D2/PMD2/RB2  6      23
     PMWR/RB3  7      22 RB11/PGEC2
               8      21 RB10/PGED2
          RA2  9      20
   (PMA0)/RA3 10      19
HSYNC/OC1/RB4 11      18 RB9/PMD3/D3
              12      17 RB8/PMD4/D4
              13      16 RB7/PMD5/D5
VSYNC/OC2/RB5 14      15

Note that RB6 is not available on pin 15 on this device (it is needed for VBUS unlike the MX170 variant).

UART Connections

UART1 is exposed by the RB13 and RB15 pins.

Data Signal Routing

A flip-flop is used to buffer the outputs:

Dn   -> 74HC273:Dn
        74HC273:Qn -> Qn
VCC  -> 74HC273:MR#
PMWR -> 74HC273:CP

For two bits of intensity, two bits per colour channel:

Q7 -> 2200R -> I
Q6 -> 4700R -> I

I -> diode -> R
I -> diode -> G
I -> diode -> B

Q5 -> 470R -> R
Q4 -> 1000R -> R
Q3 -> 470R -> G
Q2 -> 1000R -> G
Q1 -> 470R -> B
Q0 -> 1000R -> B

HSYNC -> HS
VSYNC -> VS